研究方向

• 集成电路设计与设计自动化(EDA)
• 超大规模芯片物理实现算法
• 基于AI的图像编解码芯片设计
• FPGA加速器设计

开源项目

• OpenPARF 2.0:开源大规模Multi-die FPGA布局框架

• OpenNBLG: 一种开源的混合高度单元布局合法化方法

代表性论文

• Q. Chen, Y. Deng, Q. Wu and Z. Di, "An r-DFA-based Layout Pattern Match Method Supporting Fuzzy Matching," in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, doi: 10.1109/TCAD.2025.3556969.
• Xun Jiang, Jiarui Wang, Jing Mai, Zhixiong Di, Yibo Lin: A Robust FPGA Router With Optimization of High-Fanout Nets and Intra-CLB Connections. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 44(3): 1003-1016 (2025)
• Jing Mai, Chunyuan Zhao, Zuodong Zhang, Zhixiong Di, Yibo Lin, Runsheng Wang, Ru Huang: LEGALM: Efficient Legalization for Mixed-Cell-Height Circuits with Linearized Augmented Lagrangian Method. ISPD 2025: 22-30
• Jing Mai, Jiarui Wang, Zhixiong Di, Yibo Lin: Multielectrostatic FPGA Placement Considering SLICEL-SLICEM Heterogeneity, Clock Feasibility, and Timing Optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(2): 641-653 (2024)
• Zhixiong Di, Runzhe Tao, Jing Mai, Lin Chen, Yibo Lin: LEAPS: Topological-Layout-Adaptable Multi-Die FPGA Placement for Super Long Line Minimization. IEEE Trans. Circuits Syst. I Regul. Pap. 71(3): 1259-1272 (2024)
• Zhengguang Tang, Cong Li, Hailong You, Zhixiong Di, Linying Zhang, Xingming Liu, Yu Wang, Yong Dai, Geng Bai: Semi-Supervised Transfer Learning Framework for Aging-Aware Library Characterization. IEEE Trans. Circuits Syst. II Express Briefs 71(3): 1156-1160 (2024)
• Z. Di, R. Tao, L. Chen, Q. Wu and Y. Lin, "Imbalanced Large Graph Learning Framework for FPGA Logic Elements Packing Prediction," in IEEE Transactions on Circuits and Systems II: Express Briefs, doi: 10.1109/TCSII.2023.3334247. (JCR Q2)
• J. Mai, J. Wang, Z. Di and Y. Lin, "Multi-Electrostatic FPGA Placement Considering SLICEL-SLICEM Heterogeneity, Clock Feasibility, and Timing Optimization," in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, doi: 10.1109/TCAD.2023.3313101. (CCF-A)
• J. Wang, J. Mai, Z. Di and Y. Lin, "A Robust FPGA Router with Concurrent Intra-CLB Rerouting," 2023 28th Asia and South Pacific Design Automation Conference (ASP-DAC), Tokyo, Japan, 2023, pp. 529-534. (CCF-C)
• Q. Xu, Y. Xiang, Z. Di(*), et al., "Synthetic Aperture Radar Image Compression Based on a Variational Autoencoder," in IEEE Geoscience and Remote Sensing Letters, vol. 19, pp. 1-5, 2022, Art no. 4015905. (JCR Q1)
• X. Chen, Z. Di(*), W. Wu, Q. Wu, J. Shi and Q. Feng, "Detailed Routing Short Violation Prediction Using Graph-based Deep Learning Model," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 69, no. 2, pp. 564-568, Feb. 2022. (JCR Q2)
• Z. Shao, Z. Di(*), et al., "A High-Throughput VLSI Architecture Design Of Canonical Huffman Encoder," in IEEE Transactions on Circuits and Systems II: Express Briefs(TCAS-II), vol. 69, no. 1, pp. 209-213, Jan. 2022. (JCR Q2)
• Z. Di(*), X. Chen, Q. Wu, J. Shi, Q. Feng and Y. Fan, "Learned Compression Framework With Pyramidal Features and Quality Enhancement for SAR Images," in IEEE Geoscience and Remote Sensing Letters, vol. 19, pp. 1-5, 2022, Art no. 4505605.(JCR Q1)
• J. Chen, Z. Di(*), J. Shi, Q. Feng and Q. Wu, "NBLG: A Robust Legalizer for Mixed-Cell-Height Modern Design," in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 41, no. 11, pp. 4681-4693, Nov. 2022.(CCF-A)
• Jing Mai, Yibai Meng, Zhixiong Di, and Yibo Lin. 2022. Multi-electrostatic FPGA placement considering SLICEL-SLICEM heterogeneity and clock feasibility. In Proceedings of the 59th ACM/IEEE Design Automation Conference (DAC’22). Association for Computing Machinery, New York, NY, USA, 649–654. https://doi.org/10.1145/3489517.3530568.(CCF-A)
• X. Yan, Z. Di, et al., "A High Throughput and Energy Efficient Lepton Hardware Encoder With Hash-Based Memory Optimization," in IEEE Transactions on Circuits and Systems for Video Technology, vol. 32, no. 7, pp. 4680-4695, July 2022. (JCR Q1)
• Q. Wu, X. Li, Y. Han, Z. Di and Q. Feng, "A Valley-Locking Control Scheme for an Audible Noise-Free Valley-Skip-Mode Flyback Converter," in IEEE Transactions on Industrial Electronics, vol. 69, no. 7, pp. 7285-7294, July 2022, doi: 10.1109/TIE.2021.3099223.(JCR Q1)
• Q. Wu, X. Li, Y. Li, Z. Di and Q. Feng, "Implementation of High Precision Error Amplification Scheme for AC-DC Converter," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 69, no. 3, pp. 1522-1526, March 2022, doi: 10.1109/TCSII.2021.3126166.(JCR Q2)
• Q. Wu et al., "A High Precision CV Control Scheme for Low Power AC–DC BUCK Converter Controller," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 70, no. 10, pp. 4183-4193, Oct. 2023. (JCR Q1)
• Z. Tang et al., "Semi-Supervised Transfer Learning Framework for Aging-Aware Library Characterization," in IEEE Transactions on Circuits and Systems II: Express Briefs, doi: 10.1109/TCSII.2023.3323384. (JCR Q2)
• 麦景,王嘉睿,邸志雄等.OpenPARF:基于深度学习工具包的大规模异构FPGA开源布局布线框架[J/OL].电子与信息学报:1-14[2023-10-05].
• 董勐,高一鸣,潘伟涛等.RELIC-GNN:一种高效的状态寄存器识别算法[J].西安电子科技大学学报,2023,50(03):142-150.
• Zhixiong Di, Yongming Tang, Jiahua Lu, Zhaoyang Lv:ASIC Design Principle Course with Combination of Online-MOOC and Offline-Inexpensive FPGA Board. ACM Great Lakes Symposium on VLSI 2021: 431-436. (教学研究论文)(CCF-C)

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